职位描述
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岗位职责:
1. Work closely with process RD team to develop DRC/LVS for design readiness.
2. Provide customer support to world-wide leading design house.
3. Initial more innovation to continue optimize development efficiency.
4. Work closely with various departments (Physical design/integration/Device RD/Product/ESD) on their design requirements.
5. Work closely with EDA partner for tool qualification and methodology enhance.
任职要求:
1. Good knowledge of semiconductor FEOL/BEOL process and chip design
2. Knowledge of EDA partner (Mentor, Synopsys, Cadence, etc.) tools suite is a plus. Especially Laker /Virtuoso /Calibre.
3. Scripting and programming experience using several of the following: Perl, Python, C, C , TCL, Skill.
4. Ability to work across teams to drive a solution, problem solver and self-motivated.
5. The ideal candidate will have experience in DRC/LVS development.
6. MS or above in EE, CS related fields.
1. Work closely with process RD team to develop DRC/LVS for design readiness.
2. Provide customer support to world-wide leading design house.
3. Initial more innovation to continue optimize development efficiency.
4. Work closely with various departments (Physical design/integration/Device RD/Product/ESD) on their design requirements.
5. Work closely with EDA partner for tool qualification and methodology enhance.
任职要求:
1. Good knowledge of semiconductor FEOL/BEOL process and chip design
2. Knowledge of EDA partner (Mentor, Synopsys, Cadence, etc.) tools suite is a plus. Especially Laker /Virtuoso /Calibre.
3. Scripting and programming experience using several of the following: Perl, Python, C, C , TCL, Skill.
4. Ability to work across teams to drive a solution, problem solver and self-motivated.
5. The ideal candidate will have experience in DRC/LVS development.
6. MS or above in EE, CS related fields.
工作地点
地址:宜昌伍家岗区九龙湖国际企业总部
查看地图
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职位发布者
刘先生HR
台积电(南京)有限公司
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电子技术·半导体·集成电路
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200-499人
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外商独资·外企办事处
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浦口经济开发区紫峰路16号