应届毕业生
学历不限
最近更新
3377人关注
职位描述
该职位还未进行加V认证，请仔细了解后再进行投递！
职责描述:
1.Physical implementation of advanced technology chips.
2.Design methodology development and innovation for advanced technology challenges.
3.Be responsible for 22/16/12/10/7/5nm chip implementation for customer’s projects or internal system test chips.
4.Be responsible for advanced node PPA benchmark, and solution development.
5.EDA tool new features enablement.
6.Customer onsite/offsite supports will be required on demand.
任职要求:
1.MS or above in EE, CS related fields. Experience in APR, physical verification, chip implementation, or CAD development is plus.
2.New graduate or 3 years working experience in chip physical implementation.
3.Familiar with Synopsys/Cadence APR tools/flows.
4.Familiar with TCL/Perl/Python programming.
5.Experience with TSMC advanced technology is plus.
6.Proven record in production tape-outs is plus.
招聘人数：1人
注：联系我时，请说是在海沧人才网上看到的。
工作地点
地址：南京江宁区南京-江宁区九龙湖
求职提示：用人单位发布虚假招聘信息，或以任何名义向求职者收取财物（如体检费、置装费、押金、服装费、培训费、身份证、毕业证等），均涉嫌违法，请求职者务必提高警惕。
职位发布者
HR
台积电(南京)有限公司
-
电子技术·半导体·集成电路
-
200-499人
-
外商独资·外企办事处
-
浦口经济开发区紫峰路16号
