应届毕业生
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职位描述
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岗位职责:
1.Develop advanced standard cell and GPIO libraries on advanced process technologies (6nm, 7nm, 12/16nm, 22/28nm, etc.)
2.Take challenging tasks from circuit design to SOC design to achieve world-class PPA performance (high-performance, low-power, and area-effective)
任职要求:
1.Good knowledge of circuits design. Experience in digital circuit or analog design is preferred.
2.Experience in Cadence/Synopsys/Mentor EDA tools and Linux/Unix environment is preferred
3.CAD and script capability such as Python/Perl/Shell is preferred.
4.Solid understanding of device scaling challenges and circuit-process technology interactions applicable for advanced FinFET nodes is a plus.
5.Experience in reliability (EM, high-temperature aging effects, etc.) is a plus
6.Self-motivated and hard work.
1.Develop advanced standard cell and GPIO libraries on advanced process technologies (6nm, 7nm, 12/16nm, 22/28nm, etc.)
2.Take challenging tasks from circuit design to SOC design to achieve world-class PPA performance (high-performance, low-power, and area-effective)
任职要求:
1.Good knowledge of circuits design. Experience in digital circuit or analog design is preferred.
2.Experience in Cadence/Synopsys/Mentor EDA tools and Linux/Unix environment is preferred
3.CAD and script capability such as Python/Perl/Shell is preferred.
4.Solid understanding of device scaling challenges and circuit-process technology interactions applicable for advanced FinFET nodes is a plus.
5.Experience in reliability (EM, high-temperature aging effects, etc.) is a plus
6.Self-motivated and hard work.
注：联系我时，请说是在海沧人才网上看到的。
工作地点
地址：漯河郾城区九龙湖国际企业总部
求职提示：用人单位发布虚假招聘信息，或以任何名义向求职者收取财物（如体检费、置装费、押金、服装费、培训费、身份证、毕业证等），均涉嫌违法，请求职者务必提高警惕。
职位发布者
HR
台积电(南京)有限公司
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电子技术·半导体·集成电路
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200-499人
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外商独资·外企办事处
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浦口经济开发区紫峰路16号
